SVE2 will delight parallelization enthusiasts

Ben Wodecki, Jr. Editor

April 6, 2021

2 Min Read

SVE2 will delight parallelization enthusiasts

British chip designer Arm has unveiled v9, the first new Arm processor architecture in a decade.

Among other features, the architecture supports Scalable Vector Extension version two (SVE2), developed to make it more suitable for High Performance Computing (HPC) applications, certain machine learning workloads, and other tasks that require very large quantities of data processing.

Arm CEO Simon Segars provided a very simplistic explanation of the benefits of SVE2 on the company’s blog: “The more vectors a computer can handle in parallel, and the longer those vectors are, the more powerful the computer will be.”

The original SVE was created in partnership with Fujitsu and launched in 2016. It is currently implemented in Fujitsu’s A64FX chips that power Fugaku, the world’s most powerful supercomputer.

According to Arm, v9 brings improved performance for 5G systems, virtual and augmented reality applications, and ML workloads running locally on CPUs, such as image processing and smart home applications.

An enhanced enhancement

The original SVE functionality was developed to increase parallelization of program execution, allowing devices to run complex calculations faster. It increased support for vector lengths from 128 bits, then maximum for Arm’s NEON instruction set, all the way to 2048 bits.

The Arm website suggests SVE2 “allows for more function domains in data-level parallelism.”

The post reads, “SVE2 inherits the concept, vector registers, and operation principles of SVE. SVE and SVE2 define 32 scalable vector registers. Silicon partners can choose a suitable vector length design implementation for hardware that varies between 128 bits and 2048 bits, at 128-bit increments. The advantage of SVE and SVE2 is that only one vector instruction set uses the scalable variables.”

Arm says that the main difference between SVE2 and its predecessor is “the functional coverage of the instruction set.”

“SVE was designed for HPC and ML applications. SVE2 extends the SVE instruction set to enable data-processing domains beyond HPC and ML.”

The company added that SVE2 programs “can be built once and run on hardware with various vector lengths” and that it has more vectorization flexibility.

Arm chief architect Richard Grisenthwaite said, “Armv9 will enable developers to build and program the trusted compute platforms of tomorrow by bridging critical gaps between hardware and software while enabling the standardization to help our partners balance faster time-to-market and cost control alongside the ability to create their own unique solutions.”

The company also promised “substantial enhancements” in matrix multiplication within the CPU over the next few years.

Arm will soon become part of Nvidia, having been purchased from SoftBank for a whopping $40 billion – with the pair planning to establish an AI laboratory at the Arm headquarters in Cambridge, seen as part of the takeover strategy.

Commenting on the announcement, Nvidia hardware engineering SVP Brian Kelleher said the company was looking forward to using Armv9 “to deliver a wide range of once unimaginable computing possibilities.”

About the Author(s)

Ben Wodecki

Jr. Editor

Ben Wodecki is the Jr. Editor of AI Business, covering a wide range of AI content. Ben joined the team in March 2021 as assistant editor and was promoted to Jr. Editor. He has written for The New Statesman, Intellectual Property Magazine, and The Telegraph India, among others. He holds an MSc in Digital Journalism from Middlesex University.

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